Physical electronics devices and ics miscellaneous


Physical electronics devices and ics miscellaneous

Physical Electronics Devices and ICs

  1. A JEFT is set up as a source follower. Given µ = 200, rd = 100 K and source load resistor RL = 1 K. The output resistance R0 is given approximately by—









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    In the case of source follower the approximate value of output resistance R0 is given by relation

    R0
    1
    || RL
    gm

    ∴ µ = gm. rd
    ∴ µ = gm. rd
    gm =
    µ
    =
    200
    =
    2

    rd100 × 103103

    R0
    1
    || 1000
    2/103

    =
    500·1000
    ≅ 333Ω
    1500

    Correct Option: C

    In the case of source follower the approximate value of output resistance R0 is given by relation

    R0
    1
    || RL
    gm

    ∴ µ = gm. rd
    ∴ µ = gm. rd
    gm =
    µ
    =
    200
    =
    2

    rd100 × 103103

    R0
    1
    || 1000
    2/103

    =
    500·1000
    ≅ 333Ω
    1500


  1. In an FET as VGS is changed from zero to increasing reverse bias, the value of gm









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    We know that

    gm = gm01 - VGS
    VP

    From the above relation it is clear that as VGS is changed from zero to increasing reverse bias, the value of gm decreases.

    Correct Option: B

    We know that

    gm = gm01 - VGS
    VP

    From the above relation it is clear that as VGS is changed from zero to increasing reverse bias, the value of gm decreases.



  1. Compared to the junction transistor, FET:
    1. Has a large gain bandwidth product
    2. IS less noisy
    3. Has less input resistance
    4. Has only majority carrier flow
    The correct statements are—









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    As compare to BJT, FET is (i) less noisy and (ii) here only majority carrier flow

    Correct Option: C

    As compare to BJT, FET is (i) less noisy and (ii) here only majority carrier flow


  1. In amplifier applications FET is operated in the—









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    In amplifier application FET is operated in the controlled resistor region.

    Correct Option: A

    In amplifier application FET is operated in the controlled resistor region.



  1. VPO is the pinch off voltage for VGS = 0 in an FET. When the gate is reverse biased by VG S the pinch off voltage—









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    Will be less than VPO, because when gate is reverse biased depletion width increases, which decreases the pinch-off voltage.

    Correct Option: A

    Will be less than VPO, because when gate is reverse biased depletion width increases, which decreases the pinch-off voltage.