A 4– bit modulo– 16 ripple counter used JK flipflop.

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A 4– bit modulo– 16 ripple counter used JK flipflop. If progression delay of each FF is 50 ms, then maximum clock frequency is equal to

1. 20 MHz
2. 10 MHz
3. 5 MHz
4. 4 MHz

Correct Option: C

ƒ_max =	1	=	1
	N:T_d		4 × 50 × 10^-12

= 5 MHZ.