Direction: Consider a machine with a 2-way set associative data cache of size 64 kbyte and block size 16 byte. The cache is managed using 32 bit virtual addresses and the page size is 4 kbyte. A program to be run on this machine begins as follows.
double ARR [1024] [1024]
int i, j;
/* Initialize array ARR to 0.0 */
for (i = 0; i < 1024; i ++)
for (j = 0; j < 1024; j ++)
ARR [i] [j] = 0.0;
The size of double is 8 byte. Array ARR is located in memory starting at the beginning of virtual page 0 × FF000 and stored in row major order. The cache is initially empty and no pre-fetching is done. The only data memory references made by the program are those to array ARR.
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The total size of the tags in the cache directory is
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- 32 kbit
- 34 kbit
- 64 kbit
- 68 kbit
- 32 kbit
Correct Option: D
As given that Virtual Address = 32 bits
Cache address is of the form
(TAG |SET| Block)
⇒ For BLOCK of 16 bytes, we need 4 bits.
So total number of sets (each set containing 2 Blocks) = 64 kb / (2 * 16) B = 211
So, Number of SET bits = 11
Number of TAG bits = 32 – (11 + 4) = 17
Thus, cache address = 17|11| 4 (TAG|SET| BLOCK)
Tag memory size = Number of tag bits * Total No of blocks
= 17 * 2 * 211 (Total Number of blocks = 2 * total number of sets) = 68 KB.
